2

Observability of Boolean networks: A graph-theoretic approach

Year:
2013
Language:
english
File:
PDF, 496 KB
english, 2013
4

Digital Logic Design (A Rigorous Approach) || Foundations of Synchronous Circuits

Year:
2012
Language:
english
File:
PDF, 447 KB
english, 2012
6

Embedding interconnection networks in grids via the layered cross product

Year:
2000
Language:
english
File:
PDF, 142 KB
english, 2000
7

Hitting sets when the VC-dimension is small

Year:
2005
Language:
english
File:
PDF, 90 KB
english, 2005
8

On-Line Path Computation and Function Placement in SDNs

Year:
2018
Language:
english
File:
PDF, 808 KB
english, 2018
12

Minimal controllability of conjunctive Boolean networks is NP-complete

Year:
2018
Language:
english
File:
PDF, 497 KB
english, 2018
13

Graph Algorithms || Depth-First Search

Year:
2011
Language:
english
File:
PDF, 287 KB
english, 2011
15

Digital Logic Design (A Rigorous Approach) || Decoders and Encoders

Year:
2012
Language:
english
File:
PDF, 389 KB
english, 2012
16

Efficient approximation of product distributions

Year:
1998
Language:
english
File:
PDF, 226 KB
english, 1998
17

Competitive and deterministic embeddings of virtual networks

Year:
2013
Language:
english
File:
PDF, 246 KB
english, 2013
20

Digital Logic Design (A Rigorous Approach) || Addition

Year:
2012
Language:
english
File:
PDF, 311 KB
english, 2012
22

Digital Logic Design (A Rigorous Approach) || Signed Addition

Year:
2012
Language:
english
File:
PDF, 323 KB
english, 2012
23

Online Packet-Routing in Grids with Bounded Buffers

Year:
2017
Language:
english
File:
PDF, 1.15 MB
english, 2017
27

Graph Algorithms || Flow in Networks

Year:
2011
File:
PDF, 392 KB
2011
28

Revisiting randomized parallel load balancing algorithms

Year:
2012
Language:
english
File:
PDF, 346 KB
english, 2012
33

Digital Logic Design (A Rigorous Approach) || Flip-Flops

Year:
2012
Language:
english
File:
PDF, 566 KB
english, 2012
38

Digital Logic Design (A Rigorous Approach) || Memory Modules

Year:
2012
Language:
english
File:
PDF, 315 KB
english, 2012
43

On Decoding Irregular Tanner Codes With Local-Optimality Guarantees

Year:
2014
Language:
english
File:
PDF, 5.50 MB
english, 2014
44

Digital Logic Design (A Rigorous Approach) || Synchronous Modules: Analysis and Synthesis

Year:
2012
Language:
english
File:
PDF, 319 KB
english, 2012
45

SDNoC: Software defined network on a chip

Year:
2017
Language:
english
File:
PDF, 2.74 MB
english, 2017
48

An 8-Approximation Algorithm for the Subset Feedback Vertex Set Problem

Year:
2000
Language:
english
File:
PDF, 270 KB
english, 2000
50

Digital Logic Design (A Rigorous Approach) || The ISA of a Simplified DLX

Year:
2012
Language:
english
File:
PDF, 207 KB
english, 2012